Publications

BIBTEX

Refereed Journal Publications:

    1. S. Kirbas, T. Hall, A. Sen, Evolutionary Coupling Measurement: Making Sense of the Current Chaos, Science of Computer Programming, 2017. PDF
    2. S. Kirbas, B. Caglayan, T. Hall, S. Counsel, D. H. Bowes, A. Sen, A. Bener, The Relationship between Evolutionary Coupling and Defects in Large Industrial Software, Journal of Software: Evolution and Process,, 2017. PDF
    3. A. Sen, O. Kalaci, Hybrid Data Race Detection for Multicore Software, Computing and Informatics, Accepted. PDF
    4. O.Saglamdemir, G.Berkol, G.Dundar, A.Sen, An Analog Behavioral Equivalence Boundary Search Methodology for Simulink Models and Circuit Level Designs utilizing Evolutionary Computation, Integration, the VLSI journal, 2016. PDF
    5. E. Deniz, A. Sen, MINIME-GPU: Multicore Benchmark Synthesizer for GPUs, ACM Transactions on Architecture and Code Optimization, 2015. PDF
    6. E. Deniz, A. Sen, Using Machine Learning Techniques to Detect Parallel Patterns of Multi-threaded Applications, International Journal of Parallel Programming, 2015. PDF
    7. A. Sen, E. Deniz, Thread-Level Synthetic Benchmarks for Multicore Systems, Microprocessorsand Microsystems, 2015. PDF
    8. E. Deniz, A. Sen, B. Kahne, J. Holt, MINIME: Pattern-Aware Multicore Benchmark Synthesizer, IEEE Transactions on Computers, 2015. PDF
    9. Marcelo Sousa, and Alper Sen, LLVMVF: A Generic Approach for Verification of Multicore Software, Journal of Electronic Testing: Theory and Applications, 2013. PDF
    10. Etem Deniz, Alper Sen, and Jim Holt, Verification and Coverage of Message Passing Multicore Applications, ACM Transactions on Design Automation of Electronic Systems, 17(3), 23:1-23:31, 2012. PDF
    11. Dogan Fennibay, Arda Yurdakul, and Alper Sen, A Heterogeneous Simulation and Modeling Framework for Automation Systems, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(11), 1642-1655, 2012. PDF
    12. Alper Sen, Concurrency-Oriented Verification and Coverage of System Level Designs, ACM Transactions on Design Automation of Electronic Systems, 16(4), 37:1-37:25, 2011. PDF
    13. Alper Sen, Baris Aksanli, and Murat Bozkurt, Speeding-up Cycle Based Logic Simulation using Graphics Processing Units , International Journal of Parallel Programming, 39(5), 639-661, 2011. PDF
    14. Scott Little, David Walter, Kevin Jones, Chris J. Myers, and Alper Sen, Analog/Mixed-Signal Circuit Verification Using Models Generated from Simulation Traces, In International Journal of Foundations of Computer Science (IJFCS), 2010. PDF
    15. Neeraj Mittal, Alper Sen and Vijay K. Garg, Solving Computation Slicing using Predicate Detection, In IEEE Transactions on Parallel and Distributed Systems, 18(12), 1700-1713, 2007. PDF
    16. Alper Sen and Vijay K. Garg, Formal Verification of Simulation Traces Using Computation Slicing, In IEEE Transactions on Computers, 56(4), 511-527, 2007. PDF

    Edited Books, Journals and Proceedings:

    1. A. Sen, and O. Kalaci, Hybrid Dynamic Data Race Detection in SystemC, Languages, Design Methods, and Tools for Electronic System Design, LNEE, vol. 361, 41-54, Springer, 2016.

    2. D. Ulus, A. Sen, and F. Baskaya, Integrating Circuit Analyses for Assertion-based Verification of Programmable AMS Circuits, Languages, Design Methods, and Tools for Electronic System Design, LNEE, vol. 311, 67-84, Springer, 2015.

    3. M. Ganai, A. Sen, Proceedings of the Second International Workshop on Design and Implementation of Formal Tools and Systems (DIFTS13), CEUR Workshop Proceedings, Vol. 1130, 2014.

    4. A. Sen and C. Ozturan, Guest Editorial: Special Issue on the Ninth International Symposium on Parallel and Distributed Computing (ISPDC), Scientific Programming Journal, 19(1), DOI:10.3233/SPR- 2011-0314, 2011.

    5. C. Ozturan and A. Sen, Proceedings of the Ninth International Symposium on Parallel and Distributed Computing (ISPDC), IEEE Computer Society, 2010.

    Patents:

    • M. S. Abadir, H. Anand, A. Sen, J. Bhadra, Model Correspondence Method and Device, United States Patent and Trademark Office (USPTO), US 7650579.

    • D. Fennibay, A. Yurdakul, A. Sen, An Integration Method , Turkish Patent Office, 2011-06322, granted 2014.

    Refereed Conference and Workshop Publications:

    1. Y. Koroglu, A. Sen, Design of a Modified Concolic Testing Algorithm with Smaller Constraints, Workshop on Constraint Solvers in Testing, Verification (CSTVA), 2016.

    2. Y. Koroglu, A. Sen, D. Kutluay, A. Bayraktar, Y. Tosun, M. Cinar, H. Kaya, Defect Prediction on a Legacy Industrial Software: A Case Study on Software with Few Defects, International Workshop on Conducting Empirical Studies in Industry (CESI), 2016.

    3. O.Saglamdemir, G.Dundar, A.Sen, An analog behavioral equivalence checking methodology for imulink models and circuit level designs, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2015.

    4. A. Sen, O. Kalaci, Hybrid Dynamic Data Race Detection in SystemC, Forum on Specification & Design Languages (FDL), 2014.

    5. S. Kirbas, A. Sen, B. Caglayan, A. Bener, R. Mahmutogullari, The Effect of Evolutionary Coupling on Software Defects: An Industrial Case Study on a Legacy System, ACM / IEEE International Symposium on Empirical Software Engineering and Measurement (ESEM), 2014. PDF

    6. A. Sen, G. Kara, E. Deniz, S. Niar, Fast System Level Benchmarks for Multicore Architectures, Euromicro Conference on Digital System Design (DSD), 2014. PDF

    7. D. Ulus, A. Sen, and F. Baskaya, Integrating Circuit Analyses for Assertion-based Verification of Programmable AMS Circuits, Forum on Specification & Design Languages (FDL), 2013. PDF

    8. D. Ulus, A. Sen, and F. Baskaya, Analog Layer Extensions for Analog/Mixed-Signal Assertion Languages, IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2013. PDF

    9. E. Deniz, A. Sen, J. Holt, and B. Kahne, Using Software Architectural Patterns for Synthetic Embedded Multicore Benchmark Development, IEEE International Symposium on Workload Characterization (IISWC), 2012. PDF

    10. M. Sousa, and A. Sen, Generation of TLM Testbenches Using Mutation Testing, International Conference on Hardware/Software Codesign and System Synthesis (CODES/ISSS), 2012. PDF

    11. D. Ulus, and A. Sen, Using Haloes in Mixed-Signal Assertion Based Verification, IEEE International High Level Design Validation and Test Workshop (HLDVT), 2012. PDF

    12. E. Deniz, A. Sen, and J. Holt, Verification Coverage of Embedded Multicore Applications, Design, Automation and Test in Europe Conference (DATE), 2012. PDF

    13. O. Saglamdemir, A. Sen, and G. Dundar, A Formal Equivalence Checking Methodology for Simulink and Register Transfer Level Designs, International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), 2012. PDF

    14. G. A. Malazgirt, E. Culha, A. Sen, F. Baskaya, and A. Yurdakul, A Verifiable High Level Data Path Synthesis Framework, 15th Euromicro Conference on Digital System Design (DSD), 2012. PDF

    15. A. Sen, and E. Deniz, Verification Tests for MCAPI, Microprocessor Test and Verification Workshop, 2011. PDF

    16. Alper Sen, Baris Aksanli, Murat Bozkurt, and Melih Mert, Parallel Cycle Based Logic Simulation using Graphics Processing Units , International Symposium on Parallel and Distributed Computing (ISPDC), 2010. PDF
    17. Alper Sen and Magdy S. Abadir, Coverage Metrics for Verification of Concurrent SystemC Designs Using Mutation Testing, IEEE International High Level Design Validation and Test Workshop (HLDVT), June 2010. PDF
    18. Dogan Fennibay, Arda Yurdakul, and Alper Sen, Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems, IEEE International Conference on Embedded Software and Systems (ICESS), June 2010. PDF
    19. Alper Sen, Mutation Operators for Concurrent SystemC Designs, IEEE Microprocessor Test and Verification Workshop, Dec. 2009. PDF
    20. Alper Sen, Vinit Ogale, and Magdy S. Abadir, Predictive Runtime Verification of Multi-Processor SoCs in SystemC, Design Automation Conference (DAC), June 2008. PDF
    21. Scott Little, Alper Sen, and Chris Myers, Application of Automated Model Generation Techniques to Analog Mixed Signal Circuits, In IEEE Microprocessor Test and Verification Workshop, December 2007. PDF
    22. Selma Ikiz and Alper Sen, Runtime Verification of k-Mutual Exclusion for SoC's, In IEEE Microprocessor Test and Verification Workshop, December 2007. PDF
    23. Alper Sen, Error Diagnosis in Equivalence Checking of High Performance Microprocessors, Workshop on Verification and Debugging (V&D), August 2006. PDF
    24. Vijay K. Garg, Neeraj Mittal, and Alper Sen, Using Order in Distributed Computing, American Mathematical Society (AMS) National Meeting invited, January 2006. PDF
    25. Himyanshu Anand, Jayanta Bhadra, Alper Sen, Magdy S. Abadir, and Ken G. Davis, Establishing Latch Correspondence for Embedded Circuits of PowerPC Microprocessors, IEEE International High Level Design Validation and Test Workshop (HLDVT), December 2005. PDF
    26. Alper Sen, Jayanta Bhadra, Vijay K. Garg, and Jacob A. Abraham, Formal Verification of a System-on-Chip Using Computation Slicing, International Test Conference (ITC), October 2004. PDF
    27. Neeraj Mittal, Alper Sen, Vijay K. Garg, and Ranganath Atreya, Finding Satisfying Global States: All for One and One for All, In Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), April 2004. PDF
    28. Alper Sen and Vijay K. Garg, Detecting Temporal Logic Predicates in Distributed Programs Using Computation Slicing, In Proceedings of the Seventh International Conference on Principles of Distributed Systems (OPODIS), December 2003. PDF
    29. Alper Sen and Vijay K. Garg, On Checking Whether a Predicate Definitely Holds, In Proceedings of the Third International Workshop on Formal Approaches to Testing of Software (FATES), October 2003. PDF
    30. Vijay K. Garg, Neeraj Mittal, and Alper Sen, Applications of Lattice Theory to Distributed Computing, In ACM Special Interest Group on Algorithms and Computation Theory (SIGACT) News, September 2003. PDF
    31. Alper Sen and Vijay K. Garg, Partial Order Trace Analyzer (POTA) for Distributed Programs, In Proceedings of the Third International Workshop on Runtime Verification (RV), July 2003. PDF
    32. Alper Sen and Vijay K. Garg, Detecting Temporal Logic Predicates on the Happened-Before Model, In Proceedings of International Parallel and Distributed Processing Symposium (IPDPS), April 2002. PDF